• DocumentCode
    2410337
  • Title

    A 2000 Gate Bipolar Uncommitted Logic Array

  • Author

    Colaco, S.F. ; Hulmes, H.

  • fYear
    1980
  • fDate
    22-25 Sept. 1980
  • Firstpage
    79
  • Lastpage
    81
  • Abstract
    A 2000 gate high speed Bipolar Uncommitted Logic Array using 3 micrometer minimum feature sizes has been described, The chip comprises 1980 CML gates and 64 I/O cells. Typical gate delay is 6 nanoseconds. Power Delay time produced is 0.5 pJ. A single 5 volt supply powers the chip which is fully T.T.L. compatible.
  • Keywords
    logic arrays; logic gates; 2000 gate bipolar uncommitted logic array; CML gates; I-O cells; micrometer minimum feature sizes; time 6 ns; voltage 5 V; Costs; Delay effects; Feedback; Hardware; Logic arrays; Logic gates; Microelectronics; Power supplies; Programmable logic arrays; Resistors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid State Circuits Conferene, 1980. ESSCIRC 80. 6th European
  • Conference_Location
    Grenoble
  • Type

    conf

  • DOI
    10.1109/ESSCIRC.1980.5468739
  • Filename
    5468739
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2410337