Analysis and Implementation of Parallel Low-Complexity Motion Estimation

This paper proposes a parallel architecture for motion estimation using the enhanced successive elimination (Enhanced SE) algorithm. The basic idea of this algorithm is to estimate the motion of an object by eliminating repeated access of search blocks, intense storage and computation, for all search blocks, thereby reducing power. Therefore, a parallel architecture employing this algorithm is more energy efficient as it is not as computation intensive as other block matching algorithms. Further, an architecture is used that prevents redundant memory accesses. The simulation and synthesis were carried out using Cadence tools, NcSim and RTL Compiler respectively, with 90 nm libraries. Low power, Multi VT and DFT flows have been executed. Logic equivalence has also been checked