Title :
The Need For Formal Verification In Hardware Design And What Formal Verification Has Not Done For Me Lately
Author_Institution :
Synopsys, Inc.
Keywords :
Circuit synthesis; Circuit testing; Design methodology; Formal verification; Hardware; Integrated circuit manufacture; Manufacturing processes; Process design; Pulp manufacturing; Taxonomy;
Conference_Titel :
HOL Theorem Proving System and Its Applications, 1991., International Workshop on the
Conference_Location :
Davis, CA, USA
Print_ISBN :
0-8186-2460-4
DOI :
10.1109/HOL.1991.596275
