DocumentCode :
2410798
Title :
A 1.5 V, Single-Supply, One-Transistor CMOS EEPROM
Author :
Gerber, B. ; Martin, J.-C. ; Fellrath, J.
Author_Institution :
Centre Electron. Horloger S.A., Neuchatel, Switzerland
fYear :
1980
fDate :
22-25 Sept. 1980
Firstpage :
152
Lastpage :
154
Abstract :
A 1.5 V, single-supply, one-transistor p-ch CMOS EEPROM array has been developed. Negative write and erase voltages of -28V are generated on-chip by voltage multipliers and fed by a 1.5 V logic to the matrix array. Erase and writing times are 25 ms. Endurance is 104-105 cycles.
Keywords :
CMOS memory circuits; EPROM; logic arrays; voltage multipliers; erase voltages; logic array; matrix array; negative write; one-transistor CMOS EEPROM; p-ch CMOS EEPROM array; single-supply CMOS EEPROM; voltage 1.5 V; voltage multipliers; CMOS logic circuits; CMOS technology; Diodes; EPROM; Electron emission; Logic arrays; Nonvolatile memory; Random access memory; Voltage; Writing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid State Circuits Conferene, 1980. ESSCIRC 80. 6th European
Conference_Location :
Grenoble
Type :
conf
DOI :
10.1109/ESSCIRC.1980.5468761
Filename :
5468761
Link To Document :
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