DocumentCode
2410816
Title
Fully Static CMOS 16k RAM using Dynamic Circuitry Technique
Author
Akatsuka, Y. ; Nagahashi, Y. ; Sasaki, I. ; Eguchi, K. ; Hotta, N.
Author_Institution
Nippon Electr. Co., Ltd., Tokyo, Japan
fYear
1980
fDate
22-25 Sept. 1980
Firstpage
155
Lastpage
157
Abstract
A fully static CMOS 16k RAM with fast access time of 87ns and very low power dissipation of 79mW for 200ns cycle time has been realized using dynamic circuitry technique.
Keywords
CMOS memory circuits; low-power electronics; random-access storage; dynamic circuitry; fast access time; fully static CMOS RAM; power 79 mW; storage capacity 16 Kbit; time 87 ns; very low power dissipation; CMOS integrated circuits; Clocks; Decoding; Differential amplifiers; MOS devices; Power dissipation; Random access memory; Read-write memory; Switches; Technological innovation;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Circuits Conferene, 1980. ESSCIRC 80. 6th European
Conference_Location
Grenoble
Type
conf
DOI
10.1109/ESSCIRC.1980.5468762
Filename
5468762
Link To Document