Exploration platform of embedded simd architecture for autonomous retinas

Author

Chevobbe, Stéphane ; Pajaniradja, Suresh ; Letellier, Laurent

Author_Institution

Embedded Comput. Lab., CEA, Gif-sur-Yvette, France

fYear

2010

fDate

26-28 Oct. 2010

Firstpage

281

Lastpage

288

Abstract

An integrated smart camera is a single chip composed of a sensor tightly coupled with one or more processing elements. The image processing applications that are mapped on such systems can require processing power in the range of supercomputer. To face the increasing application needs we propose in this paper a SIMD based processor optimized for the low and intermediate level of image processing. The architecture is composed of several SIMD cluster. Each cluster includes a configurable number of 2-Way PE (Processing Element) ranging from 32 to 256 running at 200 MHz. These cluster configurations provide between 12 to 102 GOPS.

Keywords

cameras; embedded systems; image processing; parallel processing; autonomous retinas; embedded SIMD architecture; frequency 200 MHz; image processing; integrated smart camera; single chip; Computer architecture; Hardware; Image processing; Parallel processing; Pixel; Registers; Software; Image processing; Machine vision; Parallel architecture; Parallel processing;

fLanguage

English

Publisher

ieee

Conference_Titel

Design and Architectures for Signal and Image Processing (DASIP), 2010 Conference on

Conference_Location

Edinburgh

Print_ISBN

978-1-4244-8734-9

Electronic_ISBN

978-1-4244-8733-2

Type

conf

DOI

10.1109/DASIP.2010.5706277

Filename

5706277