Title :
Multilayer Perceptron Neural Network Architecture using VHDL with Combinational Logic Sigmoid Function
Author :
Rani, S. P Joy Vasantha ; Kanagasabapathy, P.
Author_Institution :
Madras Inst. of Technol., Anna Univ., Chennai
Abstract :
This paper presents the hardware realization of fast and flexible feed forward neural network which is capable of dealing with fixed point arithmetic operations using VHDL with minimum number of CLB slices and good speed of performance. The hardware architecture of neural network with two input, one output and three hidden neurons occupies only 44% of CLB slices. An efficient and fast carry look-ahead adder and Booth multiplier are the essential building blocks of the processing elements to perform parallel computation in the neural network. The activation function has been carried out based on piecewise linear approximation only with combinational logic circuits
Keywords :
adders; combinational circuits; fixed point arithmetic; hardware description languages; multilayer perceptrons; multiplying circuits; piecewise linear techniques; Booth multiplier; VHDL; carry look-ahead adder; combinational logic sigmoid function; feed forward neural network; fixed point arithmetic operation; multilayer perceptron; parallel computation; piecewise linear approximation; Computer architecture; Feedforward neural networks; Feeds; Fixed-point arithmetic; Logic; Multi-layer neural network; Multilayer perceptrons; Neural network hardware; Neural networks; Neurons; Activation function; Field Programmable Gate array; Neural network; VHDL;
Conference_Titel :
Signal Processing, Communications and Networking, 2007. ICSCN '07. International Conference on
Conference_Location :
Chennai
Print_ISBN :
1-4244-0997-7
Electronic_ISBN :
1-4244-0997-7
DOI :
10.1109/ICSCN.2007.350771