CMOS varactors in NLTL pulse-compression applications

Author

Li, Ming ; Harrison, Robert G. ; Amaya, Rony E. ; Duchamp, Jean-Marc ; Ferrari, Philippe ; Tarr, N. Garry

Author_Institution

Carleton Univ., Ottawa

fYear

2007

fDate

9-12 Oct. 2007

Firstpage

1405

Lastpage

1408

Abstract

This paper discusses the feasibility of using CMOS varactors in designing all-silicon pulse-compression nonlinear transmission lines (NLTLs). Six different varactor structures based on CMOS transistors are investigated, and are divided into two groups. One group, with a monotonic C(V) characteristic, can be used in single-edge pulse-compression NLTLs, while the other, having a non-monotonic C(V), is suited for double-edge pulse-compression. After simulation and evaluation of the C_max/C_min ratios and cutoff frequencies of the six structures, two types of NMOS varactors for use in NLTL designs were fabricated in a CMOS 0.18-mum process. On-chip measurements were made. Transient simulations based on these measurements show a leading edge rise time reduction of 75% for single-edge, and 60% for double-edge pulse sharpening.

Keywords

CMOS integrated circuits; nonlinear network synthesis; pulse compression; transmission lines; varactors; CMOS process; CMOS transistors; CMOS varactors; NLTL; NMOS varactors; double-edge pulse sharpening; double-edge pulse-compression; monotonic characteristic; nonlinear transmission lines; on-chip measurements; single-edge pulse sharpening; single-edge pulse-compression; size 0.18 mum; CMOS process; CMOS technology; Cutoff frequency; Doping; MOS devices; Power system transients; Pulse measurements; Radio frequency; Transmission lines; Varactors;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Conference, 2007. European

Conference_Location

Munich

Print_ISBN

978-2-87487-001-9

Type

conf

DOI

10.1109/EUMC.2007.4405467

Filename

4405467