• DocumentCode
    2411356
  • Title

    Hardware Design for an IEEE-488/1978 Interface Chip

  • Author

    Spaanenburg, L. ; Kaat, G.J.F. ; Kooy, A.

  • Author_Institution
    Twente Univ. of Technol., Enschede, Netherlands
  • fYear
    1980
  • fDate
    22-25 Sept. 1980
  • Firstpage
    278
  • Lastpage
    280
  • Abstract
    A random-logic integrated realization of the IEEE-488/1978 standard interface is discussed. Techniques are shown to optimize the logic design as well as the testability.
  • Keywords
    IEEE standards; logic design; IEEE-488-1978 interface chip; hardware design; logic design; random-logic integrated realization; CMOS logic circuits; Circuit testing; Communication standards; Design optimization; Driver circuits; Hardware; Logic circuits; Logic design; Logic testing; System testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid State Circuits Conferene, 1980. ESSCIRC 80. 6th European
  • Conference_Location
    Grenoble
  • Type

    conf

  • DOI
    10.1109/ESSCIRC.1980.5468791
  • Filename
    5468791
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2411356