Title :
Hardware Design for an IEEE-488/1978 Interface Chip
Author :
Spaanenburg, L. ; Kaat, G.J.F. ; Kooy, A.
Author_Institution :
Twente Univ. of Technol., Enschede, Netherlands
Abstract :
A random-logic integrated realization of the IEEE-488/1978 standard interface is discussed. Techniques are shown to optimize the logic design as well as the testability.
Keywords :
IEEE standards; logic design; IEEE-488-1978 interface chip; hardware design; logic design; random-logic integrated realization; CMOS logic circuits; Circuit testing; Communication standards; Design optimization; Driver circuits; Hardware; Logic circuits; Logic design; Logic testing; System testing;
Conference_Titel :
Solid State Circuits Conferene, 1980. ESSCIRC 80. 6th European
Conference_Location :
Grenoble
DOI :
10.1109/ESSCIRC.1980.5468791
