DocumentCode :
2411530
Title :
The impact of recovery on BTI reliability assessments
Author :
Reisinger, H. ; Grasser, T. ; Hofmann, K. ; Gustin, W. ; Schlünder, C.
Author_Institution :
Inst. for Microelectron., Tech. Univ. Wien, Vienna, Austria
fYear :
2010
fDate :
17-21 Oct. 2010
Firstpage :
12
Lastpage :
16
Abstract :
BTI is shown to be the most important device degradation mechanism for combinational logic. Significant benefits regarding lifetime predictions and the total effort in measurement time can be expected from measurements minimizing recovery by a short measuring delay or/and assessments being done with AC stress for applications ensuring AC operation only.
Keywords :
MOSFET; combinational circuits; semiconductor device measurement; semiconductor device reliability; AC stress; BTI reliability assessment; combinational logic; device degradation mechanism; recovery time minimization; short measuring delay; Degradation; Delay; Stress; Stress measurement; Temperature measurement; Velocity measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Integrated Reliability Workshop Final Report (IRW), 2010 IEEE International
Conference_Location :
Stanford Sierra, CA
ISSN :
1930-8841
Print_ISBN :
978-1-4244-8521-5
Type :
conf
DOI :
10.1109/IIRW.2010.5706474
Filename :
5706474
Link To Document :
بازگشت