DocumentCode
2411631
Title
Efficient preimage computation using a novel success-driven ATPG
Author
Sheng, Shuo ; Hsiao, Michael
Author_Institution
Dept. of Electr. & Comput. Eng., Rutgers Univ., Piscataway, NJ, USA
fYear
2003
fDate
2003
Firstpage
822
Lastpage
827
Abstract
Preimage computation is a key step in formal verification. Pure OBDD-based symbolic method is vulnerable to the space-explosion problem. On the other hand, conventional ATPG/SAT-based method can handle large designs but can suffer from time explosion. Unlike methods that combine ATPG/SAT and OBDD, we present a novel success-driven learning algorithm which significantly accelerates an ATPG engine for enumerating all solutions (preimages). The algorithm effectively prunes redundant search space due to overlapped solutions and constructs a free BDD on the fly so that it becomes the representation of the preimage set at the end. Experimental results have demonstrated the effectiveness of the approach, in which we are able to compute preimages for large sequential circuits, where OBDD-based methods fail.
Keywords
automatic test pattern generation; binary decision diagrams; formal verification; logic testing; sequential circuits; formal verification; overlapped solutions; preimage computation; redundant search space; sequential circuits; success-driven ATPG; success-driven learning algorithm; Acceleration; Automatic test pattern generation; Binary decision diagrams; Data structures; Decision trees; Engines; Explosions; Formal verification; Sequential circuits; Space technology;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe Conference and Exhibition, 2003
ISSN
1530-1591
Print_ISBN
0-7695-1870-2
Type
conf
DOI
10.1109/DATE.2003.1253708
Filename
1253708
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