Title :
Using formal techniques to debug the AMBA system-on-chip bus protocol
Author :
Roychoudhury, Abhik ; Mitra, Tulika ; Karri, S.R.
Author_Institution :
Sch. of Comput., Nat. Univ. of Singapore, Singapore
Abstract :
System-on-chip (SoC) designs use bus protocols for high performance data transfer among the intellectual property (IP) cores. These protocols incorporate advanced features such as pipelining, burst and split transfers. In this paper, we describe a case study in formally verifying a widely used SoC bus protocol: the advanced micro-controller bus architecture (AMBA) protocol from ARM. In particular, we develop a formal specification of the AMBA protocol. We then employ model checking, a state space exploration based formal verification technique, to verify crucial design invariants. The presence of pipelining and split transfer in the AMBA protocol gives rise to interesting corner cases, which are hard to detect via informal reasoning. Using the SMV model checker, we have detected a potential bus starvation scenario in the AMBA protocol. Such scenarios demonstrate the inherent intricacies in designing pipelined bus protocols.
Keywords :
formal specification; formal verification; industrial property; logic testing; pipeline processing; protocols; state-space methods; system buses; system-on-chip; AMBA SoC bus protocol debugging; IP core data transfer; advanced micro-controller bus architecture protocol; burst transfers; bus starvation; formal specification; formal verification; intellectual property cores; model checking; pipelined bus protocols; pipelining; split transfers; state space exploration; system-on-chip; Access protocols; Formal specifications; Formal verification; High performance computing; Intellectual property; Pipeline processing; Safety; Space exploration; State-space methods; System-on-a-chip;
Conference_Titel :
Design, Automation and Test in Europe Conference and Exhibition, 2003
Print_ISBN :
0-7695-1870-2
DOI :
10.1109/DATE.2003.1253709