Title :
Investigation into the effect of a “through silicon via”-process on the MOS transistor reliability of a standard 0.13µm CMOS technology
Author :
Martin, Andreas ; Borucki, Ludger ; Reisinger, Hans ; Schlünder, Christian
Author_Institution :
Central reliability Dept., Infineon Technol. AG, Neubiberg, Germany
Abstract :
Introducing a through-silicon-via (TSV) process into an existing technology node additional degradation mechanisms can be expected. The focus of the investigation was on mechanical stress from the TSV on near by MOS devices and plasma charging effects from the processing of the TSV connected to MOS devices. The significance of these additional effects on the MOS transistor reliability is assessed. It is shown that a TSV-process can introduce severe reliability degradation for MOS transistors.
Keywords :
CMOS integrated circuits; integrated circuit reliability; internal stresses; silicon; CMOS technology; MOS transistor reliability; additional degradation mechanisms; mechanical stress; size 0.13 mum; through silicon via process; through-silicon-via process; Antennas; Copper; Logic gates; MOSFETs; Through-silicon vias;
Conference_Titel :
Integrated Reliability Workshop Final Report (IRW), 2010 IEEE International
Conference_Location :
Stanford Sierra, CA
Print_ISBN :
978-1-4244-8521-5
DOI :
10.1109/IIRW.2010.5706485