Title :
On the characterization of hard-to-detect bridging faults
Author :
Pomeranz, Irith ; Reddy, S.M.
Author_Institution :
Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
Abstract :
We investigate a characterization of hard-to-detect bridging faults. For circuits with large numbers of lines (or nodes), this characterization can be used to select target faults for test generation when it is impractical to target all the bridging faults (or all the realistic bridging faults). We demonstrate that the faults selected based on the proposed characterization are indeed hard-to-detect by showing that the fault coverage of a given test set with respect to this subset is lower and more sensitive to the test set than the fault coverage obtained with respect to a random subset of the same size, with respect to the complete set of faults, and when possible, with respect to a subset of realistic bridging faults of the same size. We also demonstrate that a test set for the selected subset of faults detects other faults more effectively than when a test set is derived for a randomly selected subset of faults of the same size.
Keywords :
fault simulation; integrated circuit testing; integrated logic circuits; logic simulation; logic testing; fault characterization; fault coverage; hard-to-detect bridging faults; test generation; test set; Bridge circuits; Character generation; Circuit faults; Circuit simulation; Circuit testing; Cities and towns; Computational modeling; Electrical fault detection; Fault detection; Fault diagnosis;
Conference_Titel :
Design, Automation and Test in Europe Conference and Exhibition, 2003
Print_ISBN :
0-7695-1870-2
DOI :
10.1109/DATE.2003.1253737