Title :
An application specific architecture for rate-distortion optimized motion compensation
Author :
Srinivas, P. ; Varadarajan, S. ; Kalapatapu, V. ; Bayoumi, M.
Author_Institution :
Center for Adv. Comput. Studies, Univ. of Southwestern Louisiana, Lafayette, LA, USA
Abstract :
The authors present the implementation details of the application specific architecture for rate-distortion optimized motion compensation. It is based on quadtree architecture which consists of two types of processors, P1 and P2. P1 processors are used at the leaf level and P2 processors are used at non-leaf levels. The proposed architecture supports pipelined operations both at the system level as well as at the processor level. The application specific prototype was designed for a block size of 4 × 4
Keywords :
computer architecture; application specific architecture; application specific prototype; leaf level; nonleaf level; pipelined operations; processor level; processors; quadtree architecture; rate-distortion optimized motion compensation; Application software; Computer architecture; Image coding; Motion compensation; Motion estimation; Partitioning algorithms; Prototypes; Pulse modulation; Rate-distortion; Video compression;
Conference_Titel :
Computer Architectures for Machine Perception, 1993. Proceedings
Conference_Location :
New Orleans, LA
Print_ISBN :
0-8186-5420-1
DOI :
10.1109/CAMP.1993.622492
