Title :
Heterogeneous programmable logic block architectures
Author :
Koorapaty, A. ; Chandra, V. ; Tong, K.Y. ; Patel, C. ; Pileggi, L. ; Schmit, H.
Author_Institution :
Carnegie Mellon Univ., Pittsburgh, PA, USA
Abstract :
In this paper we propose four new heterogeneous programmable logic blocks (PLBs) consisting of a combination of various sizes of look up tables (LUTs), multiplexers (MUXes), and logic gates. We demonstrate that these PLBs offer significant performance and density benefits over more homogeneous PLBs.
Keywords :
integrated logic circuits; logic gates; programmable logic devices; table lookup; LUTs; heterogeneous PLB architectures; logic gates; look up tables; multiplexers; programmable logic block architectures; Error correction; Europe; Logic circuits; Logic gates; Multiplexing; Performance analysis; Programmable logic arrays; Programmable logic devices; Table lookup; Testing;
Conference_Titel :
Design, Automation and Test in Europe Conference and Exhibition, 2003
Print_ISBN :
0-7695-1870-2
DOI :
10.1109/DATE.2003.1253761
