DocumentCode
2413145
Title
Results of A/D converter compensation with a VLSI chip
Author
Tsimbinos, J. ; Marwood, W. ; Beaumont-Smith, A. ; Lim, Cheng
Author_Institution
Defence Sci. & Technol. Organ., Edinburgh, SA, Australia
fYear
2002
fDate
11-13 Feb. 2002
Firstpage
289
Lastpage
293
Abstract
Error table compensation is one technique that can be used to improve the spurious free dynamic range of high speed A/D converters. This paper gives details of an error table compensator system that uses a VLSI chip incorporating a transversal filter programmed as a wideband differentiator, some additional on chip circuits, and a lookup table that is stored in external memory. The 10 GOPS transversal filter differentiator chip was designed and fabricated in a 0.35 /spl mu/m CMOS process, has programmable tap weights, and can operate at a maximum clock rate of 200 MHz. The results of this paper show that this error table compensation system is capable of providing up to 13 dB improvement in the dynamic range of typical high speed A/D converters. This may result in more reliable detection of weak signals of interest.
Keywords
CMOS digital integrated circuits; VLSI; analogue-digital conversion; differentiating circuits; digital filters; error compensation; high-speed integrated circuits; table lookup; 0.35 micron; 200 MHz; ADC compensation; CMOS process; FIR digital differentiators; VLSI chip; error table compensation; high speed A/D converters; lookup table; programmable tap weights; spurious free dynamic range; transversal filter; wideband differentiator; CMOS process; Circuits; Clocks; Dynamic range; Signal detection; System-on-a-chip; Table lookup; Transversal filters; Very large scale integration; Wideband;
fLanguage
English
Publisher
ieee
Conference_Titel
Information, Decision and Control, 2002. Final Program and Abstracts
Conference_Location
Adelaide, SA, Australia
Print_ISBN
0-7803-7270-0
Type
conf
DOI
10.1109/IDC.2002.995413
Filename
995413
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