Title :
5 nm gate length Nanowire-FETs and planar UTB-FETs with pure germanium source/drain stressors and laser-free Melt-Enhanced Dopant (MeltED) diffusion and activation technique
Author :
Liow, Tsung-Yang ; Kian Ming Tan ; Lee, Rinus T P ; Zhu, Ming ; Tan, Kian-Ming ; Samudra, Ganesh S. ; Balasubramanian, N. ; Yeo, Yee-Chia
Author_Institution :
Dept. of Electr. & Comput. Eng., Nat. Univ. of Singapore (NUS), Singapore
Abstract :
We report the first demonstration of pure Ge source/drain (S/D) stressors (un embedded) on the ultra-narrow or ultra-thin Si S/D regions of Nanowire-FETs and UTB-FETs, compressively straining the channels to provide up to ~100% IDsat enhancement. Devices with 5 nm gate lengths were fabricated. In addition, we report a novel Melt-Enhanced Dopant (MeltED) diffusion and activation technique to form embedded Ge S/D stressor in the S/D regions of nanowire-FETs, boosting the channel strain even further, and achieving ~125% IDsat enhancement.
Keywords :
field effect transistors; germanium; nanowires; semiconductor materials; Ge; activation technique; channel strain; diffusion; gate lengths; laser-free melt-enhanced dopant; nanowire-FET; planar UTB-FET; pure germanium source/drain stressors; size 5 nm; Capacitive sensors; Conductivity; Electronic mail; Germanium silicon alloys; Leakage current; Microelectronics; Nanoscale devices; Silicon germanium; Stress; Temperature distribution;
Conference_Titel :
VLSI Technology, 2008 Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4244-1802-2
Electronic_ISBN :
978-1-4244-1803-9
DOI :
10.1109/VLSIT.2008.4588554