DocumentCode
2413704
Title
Using GLFSRs for pseudo-random memory BIST
Author
Redeker, Michael ; Rudack, Markus ; Lobe, T. ; Niggemeyer, Dirk
Author_Institution
Div. of Design & Test, Lab. for Inf. Technol., Hannover, Germany
fYear
2000
fDate
2000
Firstpage
85
Lastpage
90
Abstract
We present the application of Generalized Linear Feedback Shift Registers (GLFSRs) for generation of patterns for pseudo-random memory built-in self-test (BIST). Recently, it was shown that using GLFSRs as pattern generators for pseudo-random logic tests can increase the fault coverage noticeably in comparison to standard pseudo-random test pattern generators. Since memory faults differ from logic faults, we examined if that is also the case for pseudo-random memory tests. We found that GLFSRs can increase the fault coverage of pseudo-random tests for several fault types, especially for complex faults as stuck-open faults. Thus, the usage of GLFSRs as pattern generators for pseudo-random memory testing is recommended although some area overhead has to be accepted
Keywords
built-in self test; integrated circuit testing; integrated memory circuits; logic testing; shift registers; complex faults; fault coverage; generalized linear feedback shift registers; logic tests; pattern generators; pseudo-random memory BIST; pseudo-random memory built-in self-test; pseudo-random memory testing; stuck-open faults; Automatic test pattern generation; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Feedback; Flip-flops; Galois fields; Logic testing; Test pattern generators;
fLanguage
English
Publisher
ieee
Conference_Titel
Memory Technology, Design and Testing, 2000. Records of the 2000 IEEE International Workshop on
Conference_Location
San Jose, CA
ISSN
1087-4852
Print_ISBN
0-7695-0689-5
Type
conf
DOI
10.1109/MTDT.2000.868620
Filename
868620
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