• DocumentCode
    2413959
  • Title

    Verification of a complex SoC; the PRO3 case-study

  • Author

    Andritsopoulos, F. ; Charopoulos, C. ; Doumenis, G. ; Karoubalis, F. ; Mitsos, Y. ; Petreas, F. ; Theologitou, I. ; Perissakis, S. ; Reisis, D.

  • Author_Institution
    Telecommun. Lab., Nat. Tech. Univ. of Athens, Greece
  • fYear
    2003
  • fDate
    2003
  • Firstpage
    224
  • Abstract
    In this paper we present the experience gained from the design and verification of a complex network processor The PRO3 processor can operate in either ATM or IP based multiprotocol networking environments, supporting link rates up to 2.4 Gbps. We describe the methodology followed during the verification process, from specifications to silicon prototype test and highlight the problems encountered during the post-layout procedure. To accommodate the application verification a proprietary debug tool is integrated in the system. The paper emphasizes the importance of the verification, addressing it as a parallel process to system design, and highlights the need for easy to verify designs.
  • Keywords
    circuit CAD; circuit optimisation; computer debugging; formal verification; hardware-software codesign; network computers; system-on-chip; timing; 2.4 Gbit/s; ATM based multiprotocol networking environment; IP based multiprotocol networking environment; PRO3 processor; complex network processor; debug tool; verification process; Application software; Asynchronous transfer mode; Bandwidth; Hardware; Laboratories; Physics; Process design; Protocols; Spine; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation and Test in Europe Conference and Exhibition, 2003
  • ISSN
    1530-1591
  • Print_ISBN
    0-7695-1870-2
  • Type

    conf

  • DOI
    10.1109/DATE.2003.1253833
  • Filename
    1253833