Author :
Kawahara, J. ; Ueki, M. ; Tagami, M. ; Yako, K. ; Yamamoto, H. ; Ito, F. ; Nagase, H. ; Saito, S. ; Furutake, N. ; Onodera, T. ; Takeuchi, T. ; Nakamura, H. ; Arita, K. ; Motoyama, K. ; Nakazawa, E. ; Fujii, K. ; Sekine, M. ; Okada, N. ; Hayashi, Y.
Abstract :
A new direct low-k/Cu dual damascene (DD) contact line has been developed for low loss (low parasitic capacitance and low resistance) CMOS device platforms by on-current BEOL technologies. The excellent low contact resistance is realized in the low-k pre-metal-dielectrics (PMD) with a reduced aspect ratio, achieving 5.4 Omega for 75 nmphi contact which is only 1/4 relative to a conventional W-plug. The CMOS active performance was improved with no reliability degradation, featuring in cost-effective RF/ubiquitous applications.
Keywords :
CMOS integrated circuits; low-k dielectric thin films; Cu; RF application; back end-of-line technology; low parasitic capacitance CMOS device; low resistance CMOS device; low-k-copper dual damascene contact lines; low-loss CMOS device platforms; resistance 5.4 ohm; size 75 nm; ubiquitous application; CMOS technology; Computed tomography; Contact resistance; Degradation; High-K gate dielectrics; MOSFETs; National electric code; Parasitic capacitance; Plugs; Radio frequency; CMOS; Cu contact; Low parasitic elements; Low-k;
