DocumentCode
2414086
Title
Solution to ESD Induced Pocket Isolation Failure in Multi Well CMOS
Author
Ruud, Troy ; Rasmussen, Bryce ; Greenwood, Bruce ; Tyler, Matthew
Author_Institution
AMI Semicond. Inc., Pocatello
fYear
2007
fDate
16-19 Sept. 2007
Firstpage
245
Lastpage
248
Abstract
An Nepi pocket isolation weakness was identified during ESD qualification of a multi-well CMOS process. Post stress Iddq leakage on an unstressed domain was discovered following supply domain matrix testing. A parasitic NPN was instrumental in creating this unusual failure signature. ESD protection network modifications alleviated the process limitations.
Keywords
CMOS integrated circuits; electrostatic discharge; failure analysis; ESD; Nepi pocket isolation weakness; multiwell CMOS; pocket isolation failure; Ambient intelligence; Circuit testing; Electrostatic discharge; Implants; Power generation; Protection; Semiconductor diodes; Stress; Substrates; Thyristors;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 2007. CICC '07. IEEE
Conference_Location
San Jose, CA
Print_ISBN
978-1-4244-1623-3
Electronic_ISBN
978-1-4244-1623-3
Type
conf
DOI
10.1109/CICC.2007.4405724
Filename
4405724
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