Title :
Novel 3-D structure for ultra high density flash memory with VRAT (Vertical-Recess-Array-Transistor) and PIPE (Planarized Integration on the same PlanE)
Author :
Kim, Jiyoung ; Hong, Augustin J. ; Ogawa, Masaaki ; Ma, Siguang ; Song, Emil B. ; Lin, You-Sheng ; Han, Jeonghee ; Chung, U-in ; Wang, Kang L.
Author_Institution :
Electr. Eng. Dept., Univ. of California, Los Angeles, CA
Abstract :
A 3-D flash memory cell of VRAT (vertical-recess-array-transistor) has been fabricated using a unique and simple 3-D integration method of PIPE (planarized integration on the same plane), which allows for the successful implementation of ultra high density flash memory. In addition, procedures to increase the memory density further using another advanced structure, Zigzag-VRAT (Z-VRAT), are developed.
Keywords :
flash memories; integrated memory circuits; 3-D integration method; 3-D structure; 3D flash memory cell; PIPE; VRAT; Zigzag-VRAT; planarized integration on the same plane; ultrahigh density flash memory; vertical-recess-array-transistor; Consumer electronics; Costs; Etching; Flash memory; Flash memory cells; Isolation technology; Lithography; Material storage; Nanoelectronics; Stacking;
Conference_Titel :
VLSI Technology, 2008 Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4244-1802-2
Electronic_ISBN :
978-1-4244-1803-9
DOI :
10.1109/VLSIT.2008.4588587
