Title :
A 2.5 Gbps CMOS Fully Integrated Optical Receicer with Lateral PIN Detector
Author :
Chen, Wei-Zen ; Huang, Shih-Hao
Author_Institution :
Nat. Chiao Tung Univ., Hsinchu
Abstract :
This paper presents the design of a monolithically integrated CMOS optical receiver, including a photo detector, a transimpedance amplifier, and a post limiting amplifier on a single chip. A novel PIN detector is proposed and adopted in this design without technology modification. The optical receiver is capable of delivering 420 mVpp to 50 Omega output load and operating up to 2.5 Gbps without an equalizer. Implemented in a generic 0.18 mum CMOS technology, the total power dissipation is 138 mW. The chip size is 0.53 mm2.
Keywords :
CMOS integrated circuits; amplifiers; integrated optics; optical receivers; CMOS fully integrated optical receiver; bit rate 2.5 Gbit/s; lateral PIN detector; monolithically integrated CMOS optical receiver; photo detector; post limiting amplifier; power 138 mW; resistance 50 ohm; size 0.18 mum; transimpedance amplifier; CMOS technology; Detectors; Equalizers; Integrated optics; Optical amplifiers; Optical design; Optical receivers; Power dissipation; Semiconductor optical amplifiers; Stimulated emission;
Conference_Titel :
Custom Integrated Circuits Conference, 2007. CICC '07. IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4244-1623-3
Electronic_ISBN :
978-1-4244-1623-3
DOI :
10.1109/CICC.2007.4405736
