• DocumentCode
    2414306
  • Title

    A 0.6GHz to 2GHz Digital PLL with Wide Tracking Range

  • Author

    Kratyuk, Volodymyr ; Hanumolu, Pavan Kumar ; Mayaram, Kartikeya ; Moon, Un-Ku

  • Author_Institution
    Silicon Lab., Beaverton
  • fYear
    2007
  • fDate
    16-19 Sept. 2007
  • Firstpage
    305
  • Lastpage
    308
  • Abstract
    A digital PLL employing an adaptive tracking technique and a novel frequency acquisition scheme achieves a wide tracking range and fast frequency acquisition. The test chip fabricated in a 0.13 mum CMOS process operates from 0.6 GHz to 2 GHz and achieves better than plusmn3200 ppm frequency tracking range when the reference clock is modulated with a 1 MHz sine wave.
  • Keywords
    CMOS integrated circuits; UHF integrated circuits; digital phase locked loops; tracking; CMOS process; adaptive tracking; digital PLL; frequency 0.6 GHz to 2 GHz; frequency acquisition; size 0.13 mum; Bandwidth; Clocks; Frequency conversion; Frequency locked loops; Frequency modulation; Integrated circuit noise; Oscillators; Phase detection; Phase frequency detector; Phase locked loops;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Custom Integrated Circuits Conference, 2007. CICC '07. IEEE
  • Conference_Location
    San Jose, CA
  • Print_ISBN
    978-1-4244-1623-3
  • Electronic_ISBN
    978-1-4244-1623-3
  • Type

    conf

  • DOI
    10.1109/CICC.2007.4405739
  • Filename
    4405739
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2414306