New design for a reset IC of mobile device

Author

Lee, Wen-Ta ; Lin, Ching-Chieh ; Hwang, Yuh-Shyan ; Chen, Jiann-Jong

Author_Institution

Grad. Inst. of Comput. & Commun. Eng., Nat. Taipei Univ. of Technol., Taipei, Taiwan

fYear

2009

fDate

25-28 May 2009

Firstpage

124

Lastpage

127

Abstract

An unexpected POR (power-on reset) may lead to system unstable or hanging-up during the booting. This paper proposed a new reset IC structure to monitor system power during power ramp-up. For system design, this chip contains hysteresis input voltage, power delay control, output enable, power good signal, and LVRC (low voltage reset circuit). Finally, the proposed IC is designed with TSMC 0.35 mum 2P4M process. The chip specifications are listed below: 3.3 V +/- 10% as input power, 1.5~5 V as analog input signal, 15~30 mV as hysteresis input voltage, 2.7~2.8 V as startup voltage of LVRC, and 40 mW as chip power consumption. It can be applied to most current mobile device.

Keywords

integrated circuit design; low-power electronics; power electronics; TSMC; hysteresis input voltage; low voltage reset circuit; mobile device; output enable; power 40 mW; power delay control; power good signal; power ramp-up; power-on reset; reset IC design; size 0.35 mum; system power monitoring; voltage 1.5 V to 5 V; voltage 15 mV to 30 mV; Application specific integrated circuits; Consumer electronics; Detectors; Energy consumption; Hardware; Hysteresis; Logic circuits; Mobile computing; Power supplies; Voltage; LVRC; POR; Power Good; ramp-up;

fLanguage

English

Publisher

ieee

Conference_Titel

Consumer Electronics, 2009. ISCE '09. IEEE 13th International Symposium on

Conference_Location

Kyoto

Print_ISBN

978-1-4244-2975-2

Electronic_ISBN

978-1-4244-2976-9

Type

conf

DOI

10.1109/ISCE.2009.5156891

Filename

5156891