DocumentCode
241481
Title
A security coprocessor embedded system-on-chip architecture for smart metering, control and communication in power grid
Author
Weilong Zhang ; Yuxiang Yuan ; Yang Liu ; Yapeng Zhang ; Xueping Jiang
Author_Institution
Smart Grid Res. Inst. of SGCC, Beijing, China
fYear
2014
fDate
28-31 Oct. 2014
Firstpage
1
Lastpage
3
Abstract
In this paper a AMBA v2.0 protocol compliable dual-processor architecture is proposed. The architecture is aimed at applications like smart metering, control and communication in power grid. The general-purpose processor (GPP) accomplishes tasks like thread scheduling, resource managing, interrupt response, and all the general calculations. While to ensure communication security and performance of the encryption/decryption operations, a security coprocessor is integrated in the proposed SoC architecture and communicates with the GPP via serial bus protocol. Various peripheral interfaces provide much convenience and possibility for system integration. The whole system has passed register transition level (RTL) function verification and the synthesis results are presented in the end.
Keywords
coprocessors; cryptography; embedded systems; power grids; protocols; smart meters; system-on-chip; AMBA v2.0 protocol; SoC architecture; communication security; dual-processor architecture; encryption-decryption operations; general-purpose processor; peripheral interfaces; power grid communication; power grid control; register transition level function verification; security coprocessor embedded system-on-chip architecture; serial bus protocol; smart metering; Abstracts; Clocks; Cryptography; Monitoring; Process control; SDRAM; System-on-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology (ICSICT), 2014 12th IEEE International Conference on
Conference_Location
Guilin
Print_ISBN
978-1-4799-3296-2
Type
conf
DOI
10.1109/ICSICT.2014.7021162
Filename
7021162
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