A High-Throughput Maximum a posteriori Probability Detector

This paper presents a maximum a posteriori probability (MAP) detector, based on a forward-only algorithm that can achieve high throughputs. The MAP algorithm is optimal in terms of bit error rate (BER) performance and, with Turbo decoding, can approach performance close to the channel capacity limit. The proposed detector utilizes a deep-pipelined architecture implemented in skew-tolerant domino and experimentally measured results verify the detector can achieve throughputs greater than 750 MHz while consuming 2.4 W. The detector is implemented in a 0.13mum CMOS technology and has a die area of 9.9 mm².