Title :
A heterodyne phase locked loop with GHz acquisition range for coherent locking of semiconductor lasers in 0.13 μm CMOS
Author :
Aflatouni, Firooz ; Momeni, Omeed ; Hashemi, Hossein
Author_Institution :
Southern California Univ., Los Angeles
Abstract :
A heterodyne electro-optical phase locked loop (EO-PLL) architecture is proposed that can lock the frequency and phase of semiconductor lasers. An aided acquisition circuit inspired by the combination of RF image rejection receivers and digital PLL architectures is incorporated in the EOPLL to extend the frequency acquisition range to GHz, even in the presence of large optical delays in the EOPLL. An integrated circuit prototype is implemented in a 0.13 μm CMOS technology and includes a wide bandwidth transimpedance amplifier and the PLL circuitry. Measurement results for the stand-alone chip and the locking of vertical cavity surface emitting lasers (VCSEL) using the implemented chip are reported.
Keywords :
CMOS integrated circuits; electro-optical devices; integrated optics; laser mode locking; optical phase locked loops; semiconductor lasers; surface emitting lasers; CMOS; RF image rejection receivers; VCSEL; acquisition circuit; coherent locking; digital PLL architectures; electro-optical phase locked loop; frequency acquisition; heterodyne phase locked loop; optical delays; semiconductor lasers; size 0.13 μm; transimpedance amplifier; vertical cavity surface emitting lasers; CMOS technology; Circuits; Lasers and electrooptics; Optical receivers; Phase locked loops; Radio frequency; Semiconductor lasers; Stimulated emission; Surface emitting lasers; Vertical cavity surface emitting lasers; Phase locked loops; integrated optics; optical phase locked loops;
Conference_Titel :
Custom Integrated Circuits Conference, 2007. CICC '07. IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4244-0786-6
Electronic_ISBN :
978-1-4244-1623-3
DOI :
10.1109/CICC.2007.4405774