DocumentCode :
2415271
Title :
Field Programmable Gate Array Design and Implementation for Fast Fourior Transform Processor
Author :
Zheng, Zi-Wei ; Ren, Zhe
Author_Institution :
Coll. of Inf. Sci. & Eng., Ningbo Univ., Ningbo, China
fYear :
2010
fDate :
7-9 May 2010
Firstpage :
4039
Lastpage :
4042
Abstract :
Design and implementation of Fast Fourior Transform (FFT) processor is one of the most important problems for multimedia, communication, networking and security (key enabling technologies supporting E-Business and E-Government). The problems of design and implementation of complex numbers FFT processor based on field programmable gate array (FPGA) are studied for the application in the fields of multimedia, communication, networking and security in this paper. In this paper, the FPGA design and implementation, the simulation and synthesis, the correctness verification of the complex numbers FFT processor, are based on the algorithm of radix-2 Demation-In-Time (DIT), the hardware platform of XC2V40 that is one of the FPGA chips, the software platform of ISE9.1 provided by Xilinx Inc, VHSIC hardware description language (VHDL).
Keywords :
fast Fourier transforms; field programmable gate arrays; hardware description languages; hardware-software codesign; microprocessor chips; FPGA chips; VHSIC hardware description language; Xilinx Inc; correctness verification; fast Fourier transform processor; field programmable gate array design; multimedia; networking; ofradix-2 Demation-In-Time; security; software platform; Arrays; Discrete Fourier transforms; Field programmable gate arrays; Logic gates; Random access memory; Read only memory; Fast Fourior Transform; field programmable gate array; hardware description language;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
E-Business and E-Government (ICEE), 2010 International Conference on
Conference_Location :
Guangzhou
Print_ISBN :
978-0-7695-3997-3
Type :
conf
DOI :
10.1109/ICEE.2010.1014
Filename :
5591624
Link To Document :
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