On IIP2 Improvement by Injecting DC Offset at the Mixer in a Wireless Receiver

Author

Elahi, Imtinan ; Muhammad, Khurram

Author_Institution

Texas Instrum., Dallas

fYear

2007

fDate

16-19 Sept. 2007

Firstpage

659

Lastpage

662

Abstract

We present a digital calibration technique for improving IIP2 by injecting DC offset at the mixer. Most receivers offer DC offset cancellation circuitry, and a targeted non-zero DC offset at mixer output is up-converted to RF carrier frequency due to poor reverse isolation of the mixer switch. By controlling amplitude of the injected DC, IIP2 degradation due to LO leakage at the input of RF amplifiers can be compensated. Mathematical analysis and measurement data for a quad-band GSM/GPRS receiver implemented in 90-nm digital CMOS process are presented. Calibrated IIP2 of 50 dBm is reported at LNA input.

Keywords

CMOS digital integrated circuits; cellular radio; low noise amplifiers; mathematical analysis; mixers (circuits); oscillators; packet radio networks; radio receivers; radiofrequency amplifiers; DC offset cancellation circuitry; IIP2 degradation; IIP2 improvement; LNA input; LO leakage; RF amplifiers; digital CMOS process; digital calibration technique; mathematical analysis; mixer; nonzero DC offset; quad-band GSM/GPRS receiver; reverse isolation; size 90 nm; wireless receiver; CMOS process; Calibration; Degradation; GSM; Ground penetrating radar; Mathematical analysis; Radio frequency; Radiofrequency amplifiers; Switches; Switching circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 2007. CICC '07. IEEE

Conference_Location

San Jose, CA

Print_ISBN

978-1-4244-1623-3

Electronic_ISBN

978-1-4244-1623-3

Type

conf

DOI

10.1109/CICC.2007.4405818

Filename

4405818