• DocumentCode
    2416314
  • Title

    A 60 GHz Power Amplifier in 90nm CMOS Technology

  • Author

    Heydari, Babak ; Bohsali, Mounir ; Adabi, Ehsan ; Niknejad, Ali M.

  • Author_Institution
    Univ. of California at Berkeley, Berkeley
  • fYear
    2007
  • fDate
    16-19 Sept. 2007
  • Firstpage
    769
  • Lastpage
    772
  • Abstract
    A two-stage 60 GHz 90 nm CMOS PA has been designed and fabricated. The amplifier has a measured power gain of 9.8 dB. The input is gain matched while the output is matched to maximize the output power. The measured P-1dB = 6.7 dBm with a corresponding power added efficiency of 20%. This amplifier can be used as a pre-driver or as the main PA for short range wireless communication. The output power can be boosted with on-chip or spatial power combining.
  • Keywords
    CMOS analogue integrated circuits; millimetre wave power amplifiers; power combiners; CMOS PA; CMOS technology; frequency 60 GHz; gain 9.8 dB; on-chip power combining; power added efficiency; power amplifier; size 90 nm; spatial power combining; CMOS technology; Fingers; Frequency; Impedance matching; Power amplifiers; Power combiners; Power generation; Power measurement; Transmitters; Wireless communication;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Custom Integrated Circuits Conference, 2007. CICC '07. IEEE
  • Conference_Location
    San Jose, CA
  • Print_ISBN
    978-1-4244-1623-3
  • Electronic_ISBN
    978-1-4244-1623-3
  • Type

    conf

  • DOI
    10.1109/CICC.2007.4405843
  • Filename
    4405843
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2416314