Title :
An Embedded 8-bit RISC Controller for Yield Enhancement of the 90-nm PRAM
Author :
Kim, Hyejung ; Sohn, Kyomin ; Yoo, Jerald ; Yoo, Hoi-Jun
Author_Institution :
KAIST, Daejeon
Abstract :
An embedded 8 b RISC for advanced memories is designed to control, analyze and optimize the memory timing and voltage parameters. The processor-based built-in-self-optimize (BISO) algorithm is proposed to enhance the memory yield. A test PRAM with the RISC is fabricated in 90 nm, 3-metal diode-switch process. By applying BISO, the PRAM margin window increases by 221%. It operates at 100 MHz and consumes 28.4 mW at 1.0 V supply voltage. The embedded RISC enables 100 Mb/s/pin read/write throughputs to PRAM.
Keywords :
embedded systems; random-access storage; reduced instruction set computing; 3-metal diode switch process; PRAM; advanced memories; built in self optimize algorithm; embedded 8-bit RISC controller; frequency 100 MHz; memory timing; phase change random access storage; power 28.4 mW; size 90 nm; voltage 1.0 V; voltage parameters; word length 8 bit; yield enhancement; Control systems; Decoding; Logic testing; Phase change random access memory; Random access memory; Read-write memory; Reduced instruction set computing; Registers; Throughput; Voltage control;
Conference_Titel :
Custom Integrated Circuits Conference, 2007. CICC '07. IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4244-1623-3
Electronic_ISBN :
978-1-4244-1623-3
DOI :
10.1109/CICC.2007.4405847
