• DocumentCode
    241641
  • Title

    An 8-bit 1-GS/s flash-assisted time-interleaved SAR ADC

  • Author

    Jixuan Xiang ; Huabin Chen ; Chixiao Chen ; Fan Ye ; Jun Xu ; Junyan Ren

  • Author_Institution
    State Key Lab. of ASIC & Syst., Fudan Univ., Shanghai, China
  • fYear
    2014
  • fDate
    28-31 Oct. 2014
  • Firstpage
    1
  • Lastpage
    3
  • Abstract
    This paper presents an 8-bit 1GS/s flash-assisted time-interleaved SAR ADC consisting of one 2-bit flash ADC and one 6-bit SAR ADC with 4 time-interleaved channels. The hybrid capacitive DAC controls segmented thermometer MSB capacitors and the binary LSBs. This architecture improves speed significantly with 1GHz sampling rates. This work realizes the ENOB with 7.93-bit, consumes power of 4.86 mW from a 1.2-V supply voltage in 65-nm process and achieves FoMs to 19.9 and 24.7 fJ/conversion-step at low and nyquist input, respectively.
  • Keywords
    analogue-digital conversion; digital-analogue conversion; 4 time-interleaved channels; binary LSBs; flash-assisted time-interleaved SAR ADC; frequency 1 GHz; hybrid capacitive DAC controls; power 4.86 mW; size 65 nm; thermometer MSB capacitors; voltage 1.2 V; word length 2 bit; word length 6 bit; word length 8 bit; Abstracts;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State and Integrated Circuit Technology (ICSICT), 2014 12th IEEE International Conference on
  • Conference_Location
    Guilin
  • Print_ISBN
    978-1-4799-3296-2
  • Type

    conf

  • DOI
    10.1109/ICSICT.2014.7021243
  • Filename
    7021243