A low power CMOS technology compatible non-volatile SRAM cell

This paper presents a CMOS technology compatible non-volatile 8T SRAM called NV SRAM. NV SRAM works as conventional 8T SRAM to keep high speed and high noise margin in work mode; in sleep mode, the data is kept in non-volatile part and the power supply is switched off, thereby minimizing the leakage energy without data loss. Based on 65 nm SMIC Technology, simulation results show that sleep time is longer than 219 μs, NV SRAM is able to achieve energy savings. The NV SRAM is particularly effective to implement on-chip-memories with long idle time.