DocumentCode :
241676
Title :
Ant system based 3D fixed-outline floor planning
Author :
Qi Xu ; Song Chen ; Bin Li
Author_Institution :
Dept. of Electron. Sci. & Technol., Univ. of Sci. & Technol. of China, Hefei, China
fYear :
2014
fDate :
28-31 Oct. 2014
Firstpage :
1
Lastpage :
3
Abstract :
The three dimension integrated circuit (3D IC) can alleviate the interconnect issue in the nanoscale era, and is promising for heterogeneous integration. In this paper, we propose a two-phase method, combining ant system algorithm (AS) and simulated annealing to handle the 3D IC floorplanning with fixed-outline constraints. We propose a floorplan construction method for AS, where blocks are packed one by one, and the partitioned sequence pair is used to represent 3D IC floorplans. During the packing procedure, we have to make two decisions: (1) selecting a block to pack and (2) finding a proper position for the selected block in the constructed partial floorplan. The AS is used to explore the appropriate orders for packing blocks. When packing a block, the best position in the partial constructed floorplan will be selected. In the AS, we use the area of a block and the connection degree between blocks to represent the heuristic information, and also modify the pheromone update rule to adapt to the 3D IC floorplanning problem. The experimental results show the effectiveness of the proposed method.
Keywords :
integrated circuit layout; simulated annealing; three-dimensional integrated circuits; 3D IC floorplanning; 3D fixed-outline floor planning; 3D integrated circuit; ant system algorithm; floorplan construction method; heterogeneous integration; simulated annealing; Abstracts; Through-silicon vias; Wires;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2014 12th IEEE International Conference on
Conference_Location :
Guilin
Print_ISBN :
978-1-4799-3296-2
Type :
conf
DOI :
10.1109/ICSICT.2014.7021260
Filename :
7021260
Link To Document :
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