DocumentCode
2417311
Title
Low cost and flexible processor-based controller for timing signal generation in PDP
Author
Lee, Jae-Woon ; Park, Myung-Jin ; Kim, Young Hwan
Author_Institution
Div. of Electr. & Comput. Eng., Pohang Univ. of Sci. & Technol. (POSTECH), Pohang, South Korea
fYear
2009
fDate
25-28 May 2009
Firstpage
692
Lastpage
695
Abstract
This paper presents a processor for timing signal generation, developed to provide the capability to generate the real-time control signal outputs through software programming. Using the proposed processor, we also developed a low cost and flexible timing signal generator for driving PDP system. The proposed timing signal generator adopts efficient architecture to control the PDP operations, implemented with small hardware resources. The controller using FPGA implementation runs at 50 MHz operating clock frequency, and it successfully displays motion pictures on 42-inch PDP.
Keywords
field programmable gate arrays; flexible displays; plasma displays; signal generators; FPGA implementation; PDP system; flexible processor-based controller; frequency 50 MHz; motion pictures; plasma display panel; real-time control signal; software programming; timing signal generation; Clocks; Computer architecture; Costs; Field programmable gate arrays; Hardware; Motion control; Process control; Signal generators; Signal processing; Timing; flexibiltity; low cost; plasma display panel; processor-based real-time control; timing signal generation;
fLanguage
English
Publisher
ieee
Conference_Titel
Consumer Electronics, 2009. ISCE '09. IEEE 13th International Symposium on
Conference_Location
Kyoto
Print_ISBN
978-1-4244-2975-2
Electronic_ISBN
978-1-4244-2976-9
Type
conf
DOI
10.1109/ISCE.2009.5157030
Filename
5157030
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