A background time-skew calibration for flash-assisted time-interleaved SAR ADCS with redundant check bit

This paper describes a timing-skew calibration technique in the flash-assisted (FA) time-interleaved (TI) successive approximation register (SAR) ADC structure, which eliminate the phase error between the frontend Flash ADC´s and the sub-SAR ADCs´ sampling clocks. Based on the skew information detected by the redundant check bit implemented in Flash ADC, the clocks of the time-interleaved SAR ADCs are adaptively synchronized with that of the Flash ADC. This timing-skew calibration technique is easy for hardware realization, as only one check bit is used. The algorithm is effective in the under-sampling system, which is required by the time-interleaved sub-SAR ADCs.