Title :
A testing system for high speed multi-channel ADC with LVDS data output based on FPGA
Author :
Qiang Zhang ; Yongzhen Chen ; Yuan Su ; Ye Fan ; Junyan Ren
Author_Institution :
State-Key Lab. of ASIC & Syst., Fudan Univ., Shanghai, China
Abstract :
The paper describes a system based on FPGA to capture the output of high speed multi-channel ADC with LVDS data output. Using the board (HSC-ADC-EVALC), with a Xilinx FPGA on it, the speed of capturing can reach up to 560MHz. Through the standard data bus, it will be able to be used to capture any other ADCs with LVDS output. The data in this paper is seized from a 14Bit 50MS/s ADC and read as well as stored by the software of Xilinx named ChipScope, meanwhile analyzed by Matlab using FFT.
Keywords :
analogue-digital conversion; fast Fourier transforms; field programmable gate arrays; ChipScope; FFT; HSC-ADC-EVALC board; LVDS data output; Matlab analysis; Xilinx FPGA; high speed multichannel ADC; standard data bus; testing system; word length 14 bit; Abstracts; Clocks; Connectors; Field programmable gate arrays; Oscillators; PROM; Testing;
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2014 12th IEEE International Conference on
Conference_Location :
Guilin
Print_ISBN :
978-1-4799-3296-2
DOI :
10.1109/ICSICT.2014.7021343
