DocumentCode :
2418759
Title :
Low voltage low power pipelined ADC for video applications
Author :
Samad, Hameed Zohaib ; Sriharirao, Patri ; Sarangam, K.
Author_Institution :
Dept. of Electron. & Commun. Eng., Nat. Inst. of Technol., Warangal, India
fYear :
2010
fDate :
3-4 April 2010
Firstpage :
161
Lastpage :
165
Abstract :
In today´s world application of battery powered analog and mixed mode electronic device requires designing analog circuit to operate at low voltage levels. There are many issues which are involved in implementing low voltage circuits such as reduced noise immunity, greater delay and poor linearity. There is a need to use certain MOSFET techniques so that the MOSFET can be used even in sub-threshold region without any significant change in its performance. Certain techniques have been put forward corresponding to low voltage analog circuits using CMOS Technology to be used in variety of applications. Accordingly we propose to design a 10 bits 30Msample/s CMOS Analog to Digital Converter (ADC) using a 1.5-bits/stage pipeline architecture for high speed signal processing to be used in video related applications.
Keywords :
CMOS integrated circuits; analogue integrated circuits; analogue-digital conversion; low-power electronics; pipeline processing; video signal processing; CMOS technology; analog to digital converter; high speed signal processing; low voltage analog circuit; low voltage low power pipelined ADC; pipeline architecture; video application; Analog circuits; Batteries; CMOS analog integrated circuits; CMOS technology; Circuit noise; Delay lines; Linearity; Low voltage; MOSFET circuits; Noise reduction;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Students' Technology Symposium (TechSym), 2010 IEEE
Conference_Location :
Kharagpur
Print_ISBN :
978-1-4244-5975-9
Electronic_ISBN :
978-1-4244-5974-2
Type :
conf
DOI :
10.1109/TECHSYM.2010.5469177
Filename :
5469177
Link To Document :
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