An improved voltage doubler in a standard CMOS technology

Author

Favrat, Pierre ; Deval, Philippe ; Declercq, Michel J.

Author_Institution

Electron. Lab., Swiss Fed. Inst. of Technol., Lausanne, Switzerland

Volume

1

fYear

1997

fDate

9-12 Jun 1997

Firstpage

249

Abstract

A charge pump cell is used to make a voltage doubler using improved serial switches. The PMOS transistor used for the serial switch is analyzed and a model ready for simulation is described. The importance of capacitors is shown with plots of efficiency versus load and stray capacitors. Several optimizations and problems arising at low voltage or high frequency are presented. The substrate current is totally suppressed by the technique of bulk commutation. The real efficiency, when all optimizations are implemented, approaches 80%

Keywords

CMOS analogue integrated circuits; circuit optimisation; equivalent circuits; field effect transistor switches; integrated circuit modelling; voltage multipliers; 80 percent; PMOS transistor; PMOSFET switch; bulk commutation; charge pump cell; optimizations; serial switches; simulation model; standard CMOS technology; substrate current suppression; voltage doubler; Analytical models; CMOS technology; Capacitors; Charge pumps; Circuits; Frequency; Low voltage; MOSFETs; SPICE; Switches;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on

Print_ISBN

0-7803-3583-X

Type

conf

DOI

10.1109/ISCAS.1997.608688

Filename

608688