• DocumentCode
    241961
  • Title

    Hybrid pseudo type-III compensated AVS-enabled regulator for energy-efficient computing

  • Author

    Shaowei Zhen ; Ji Wang ; Dongjie Yang ; Songlin Fu ; Ping Luo ; Yajuan He ; Bo Zhang

  • Author_Institution
    State Key Lab. of Electron. Thin Films & Integrated Devices, Univ. of Electron. Sci. & Technol. of China, Chengdu, China
  • fYear
    2014
  • fDate
    28-31 Oct. 2014
  • Firstpage
    1
  • Lastpage
    3
  • Abstract
    Adaptive voltage scaling (AVS) regulator is proposed in the paper. Based on hybrid pseudo type-III (HPT3) compensator, the digital load is powered adaptively with operation frequency. Consequently, the power dissipation of digital circuit is reduced significantly, especially for lower operation frequency. The proposed HPT3 compensator consists of analog phase lead (APD) compensation path and delay integration (DPI) compensation path. The output voltage and the delay of critical path are feed to APD path and DPI path, respectively. The delay of critical path is then clamped to one clock cycle by setting output voltage adaptively. The proposed AVS-enabled regulator is designed with 0.13μm CMOS process. Simulation results show that the converter is well regulated over external clock frequency range of 20MHz-300MHz. The overshoot and undershoot voltage for load transient response of 400mA are smaller than 35mV and 30mV, respectively. And the recovery time is less than 3μs. The frequency tracking speed from 20MHz to 100MHz is 5μs. Compared to fixed supply voltage and DVS, up to 84.6% and energy consumption is saved by using the proposed AVS-enabled regulator.
  • Keywords
    CMOS integrated circuits; clocks; convertors; power aware computing; transient response; voltage regulators; APD path; AVS regulator; CMOS process; DPI path; HPT3 compensator; adaptive voltage scaling regulator; analog phase lead compensation path; current 400 mA; delay integration compensation path; digital circuit power dissipation; energy-efficient computing; frequency 20 MHz to 300 MHz; frequency tracking speed; hybrid pseudo type-III compensator; hybrid pseudotype-III compensated AVS-enabled regulator; load transient response; operation frequency; size 0.13 mum; time 5 mus; Abstracts; Artificial intelligence; CMOS integrated circuits; Clocks; Regulators; Switches; Voltage control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State and Integrated Circuit Technology (ICSICT), 2014 12th IEEE International Conference on
  • Conference_Location
    Guilin
  • Print_ISBN
    978-1-4799-3296-2
  • Type

    conf

  • DOI
    10.1109/ICSICT.2014.7021406
  • Filename
    7021406