A novel SEU-tolerant MRAM latch circuit based on C-element

Author

Deming Zhang ; Wang Kang ; Yuanqing Cheng ; Geifei Wang ; Ravelosona, Dafine ; Youguang Zhang ; Klein, Jacques-Olivier ; Weisheng Zhao

Author_Institution

Spintronics Interdiscipl. Center, Beihang Univ., Beijing, China

fYear

2014

fDate

28-31 Oct. 2014

Firstpage

1

Lastpage

3

Abstract

Benefiting from its inherent hardness to radiation and non-volatility, magnetic random access memory (MRAM) is considered as one of the most promising non-volatile memory (NVM) technologies for aerospace and avionic electronics. However, MRAM is still sensitive to single event upsets (SEU) due to its CMOS employed peripheral circuit. In this paper, we propose a novel SEU-tolerant MRAM latch circuit, which is based on the special device C-element. By using a physics-based MTJ compact model and the 40nm design kit, hybrid simulations have been performed and simulation results show that the proposed MRAM latch circuit is immune to radiation effects.

Keywords

CMOS memory circuits; MRAM devices; flip-flops; radiation hardening (electronics); C-element; CMOS employed peripheral circuit; NVM technology; SEU-tolerant MRAM latch circuit; aerospace electronics; avionic electronics; hybrid simulation; magnetic random access memory; nonvolatile memory technology; physics-based MTJ compact model; radiation effect; single event upset; Abstracts; CMOS integrated circuits; CMOS technology; Latches; Switching circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated Circuit Technology (ICSICT), 2014 12th IEEE International Conference on

Conference_Location

Guilin

Print_ISBN

978-1-4799-3296-2

Type

conf

DOI

10.1109/ICSICT.2014.7021415

Filename

7021415