Material challenges for wafer level packaging

Flip chip as the smallest packaging design has been used in more and more electronic applications. Flip chip underfill is an essential component for the reliability of the package. Currently, the dispensing process is done on each individual chip level after the solder interconnects have been made. The device then has to go through a separate curing process to harden the underfill material. The current underfilling process is cumbersome and is one of the cost drivers of flip chip application. In wafer level flip chip packaging, the dispensing is made over the whole wafer in one step. After dicing, the reflow and the curing of underfill will be accomplished also in one step. The saving on process cost will be substantial. The new process brings new challenges to underfill material development. In addition to performing the reinforcement role as an underfill, these new materials have to be compatible with the proposed wafer level process. In addition, the underfill material has to act as a fluxing agent during solder reflow. The underfill materials also have to demonstrate good room temperature stability after being dispensed onto wafer, handled at ambient environment, and before being cured in the reflow oven. The authors will discuss the parameters that determine the material performance at each processing step as well as the material development effort in a wafer-level underfill development program, which is sponsored by the Advanced Technology Program (ATP)