DocumentCode :
242075
Title :
Analysis and design of CMOS charge pump for EEPROM
Author :
Haibin Yin ; Xiaohong Peng ; Jinhui Wang ; Zikui Wei ; Na Gong
Author_Institution :
VLSI & Syst. Lab., Beijing Univ. of Technol., Beijing, China
fYear :
2014
fDate :
28-31 Oct. 2014
Firstpage :
1
Lastpage :
3
Abstract :
A CMOS charge pump circuit, which can be applied in electrically erasable programmable read-only memory (EEPROM), is introduced in this paper. The performance including output voltage, rise time, power as well as changing pattern of output voltage versus load current of the traditional Dickson charge pump (TDCP), improved charge pump (ICP), and second improved charge pump schematic (NCP-2) are analyzed and compared. The simulation results show that the output voltage of NCP-2 is higher than other two charge pump circuits in three process corners. Meanwhile, the power consumption of NCP-2 is also much higher than other two circuits.
Keywords :
CMOS memory circuits; EPROM; charge pump circuits; power consumption; CMOS charge pump circuit design analysis; Dickson charge pump; EEPROM; ICP; NCP-2; TDCP; electrically erasable programmable read-only memory; load current; output voltage changing pattern; power consumption; rise time; second improved charge pump schematic; three process corners; Abstracts; CMOS integrated circuits; EPROM; Education; Iterative closest point algorithm;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2014 12th IEEE International Conference on
Conference_Location :
Guilin
Print_ISBN :
978-1-4799-3296-2
Type :
conf
DOI :
10.1109/ICSICT.2014.7021464
Filename :
7021464
Link To Document :
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