A 23.2 dBm linear power amplifier using pre-distortion technique for LTE applications

Author

Chung-Ching Lin ; Tso-Yu Wu ; Jeng-Rern Yang

Author_Institution

Dept. of Commun. Eng., Yuan Ze Univ., Taoyuan, Taiwan

fYear

2014

fDate

28-31 Oct. 2014

Firstpage

1

Lastpage

3

Abstract

A fully integrated 1.8 GHz CMOS power amplifier is presented in this paper. The proposed power amplifier consists of a three-stage cascade structure comprising a driver stage, a pre-distortion stage, and a power stage. The pre-distortion stage involves the use of two diode connected MOSFETs as a non-linearity generator to expand the 1dB compression point (P1dB) and enhance the power added efficiency (PAE) performance. The simulation result indicated that the circuit exhibited a power gain of 28.3 dB, an output power at the P1dB of 23.2 dBm, and a PAE of 32% under 3.3V supply. While applying an uplink LTE modulated signal, the amplifier delivers an average output power of 20.5 dBm.

Keywords

CMOS integrated circuits; Long Term Evolution; MOSFET; UHF power amplifiers; driver circuits; diode connected MOSFET; driver stage; efficiency 32 percent; frequency 1.8 GHz; gain 28.3 dB; integrated CMOS power amplifier; linear power amplifier; nonlinearity generator; power stage; pre-distortion stage; pre-distortion technique; three-stage cascade structure; uplink LTE modulated signal; voltage 3.3 V; CMOS integrated circuits; CMOS technology; Linearity; Long Term Evolution; Power amplifiers; Power generation; Wireless communication; CMOS; power amplifier; pre-distortion;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated Circuit Technology (ICSICT), 2014 12th IEEE International Conference on

Conference_Location

Guilin

Print_ISBN

978-1-4799-3296-2

Type

conf

DOI

10.1109/ICSICT.2014.7021472

Filename

7021472