A novel capacitor-less DRAM with raised source structure

We proposed a new 1T-DRAM cell with raised source structure. The cell using the raised source region can achieve the characteristics of long gate length one in a limited area and it can suppress short channel effects to improve the gate controllability. Also, since the raised source structure, the drain and source junctions of the cell will not to contact together so that the device does not appear punch through effect even the high drain bias is applied. In addition, it possesses a larger data storage region but without increasing the integrated area. Besides, the programming window can be improved greatly compared with the conventional planar MOSFET, and the retention time of it can also be improved.