A current-mode phase-locked loop using a log-domain oscillator

This paper describes the design of a high frequency, wide tuning range and low distortion current-mode phase-locked loop. The loop is simple to tune, with independent control of centre frequency and loop bandwidth by varying bias currents. The loop employs the recently proposed current-mode `log-domain´ oscillator in a classical phase-locked loop topology to obtain these features. Simulation results, using HSPICE with Nortel 0.8 μm BiCMOS technology, demonstrate that the current-mode phase-locked loop operates with a lock range of 3.5 MHz at a centre frequency of 50 MHz. Total harmonic distortion of the oscillator output at 50 MHz, with a peak-to-peak amplitude of 75% of the bias current, is less than 1.5% (-36 dB). The centre frequency of the phase-locked loop can be varied over several decades