Title :
Variations of interconnect capacitance and RC delay induced by process fluctuations
Author_Institution :
Syst. LSI Design Div., Toshiba Corp., Yokohama, Japan
Abstract :
This article describes the influence of the process fluctuations such as the critical dimension (CD) variation on the interconnect capacitance C and RC delay. It is found that there is a tradeoff between C and RC delay variations because of the fringing capacitance. A new interconnect design guideline to reduce C and/or RC delay variations is proposed
Keywords :
capacitance; fluctuations; integrated circuit design; integrated circuit interconnections; integrated circuit modelling; semiconductor process modelling; RC delay; critical dimension variation; fringing capacitance; interconnect capacitance; interconnect design guideline; process fluctuations; tradeoff; Analytical models; Capacitance; Delay; Equations; Fluctuations; Guidelines; Integrated circuit interconnections; Large scale integration; Performance analysis; Very large scale integration;
Conference_Titel :
Statistical Metrology, 2000 5th International Workshop on
Conference_Location :
Honolulu, HI
Print_ISBN :
0-7803-5896-1
DOI :
10.1109/IWSTM.2000.869314
