• DocumentCode
    2421937
  • Title

    A reconfigurable platform for the automatic synthesis of analog circuits

  • Author

    Zebulum, Ricardo Salem ; Sinohara, Helio Takahiro ; Vellasco, Marley Maria R ; Santini, Cristina Costa ; Pacheco, Marco Aurélio C ; Szwarcman, Moisés H.

  • Author_Institution
    Jet Propulsion Lab., California Inst. of Technol., Pasadena, CA, USA
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    91
  • Lastpage
    98
  • Abstract
    Reconfigurable chips are integrated circuits whose internal connections can be programmed by the user to attend a specific application. Field Programmable Gate Arrays (FPGAs) and Field Programmable Analog Arrays (FPAAs) constitute the state of the art in the technology of reconfigurable chips, referring to digital and analog devices respectively. These devices will become the building blocks of a forthcoming class of hardware, with the important features of self-adaptation and self-repairing, through automatic reconfiguration. These are essential features for systems that need to perform for a long time in harsh environments such as those employed in space exploration missions. Automatic reconfiguration of field programmable devices may potentially be driven by Evolutionary Computation techniques such as Generic Algorithms. FPAAs have just recently appeared, and most projects are being carried out in universities and research centers. In this article we propose a new model of reconfigurable analog circuit and describe its application in the intrinsic evolution of a simple logic inverter
  • Keywords
    circuit CAD; field programmable gate arrays; genetic algorithms; FPGAs; analog circuits; automatic reconfiguration; automatic synthesis; field programmable analog arrays; field programmable devices; generic algorithms; integrated circuits; logic inverter; reconfigurable chips; reconfigurable platform; Analog circuits; Application specific integrated circuits; Educational institutions; Evolutionary computation; Field programmable analog arrays; Field programmable gate arrays; Hardware; Integrated circuit synthesis; Integrated circuit technology; Space exploration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Evolvable Hardware, 2000. Proceedings. The Second NASA/DoD Workshop on
  • Conference_Location
    Palo Alto, CA
  • Print_ISBN
    0-7695-0762-X
  • Type

    conf

  • DOI
    10.1109/EH.2000.869346
  • Filename
    869346